Thursday, June 21, 2007
IEEE Circuits and Systems, Dallas Chapter:   Seminar
 
https://ewh.ieee.org/soc/cas/dallas/ 
 

 

Title�������� :Highly integrated, re-configurable RF Receivers with an example of a WCDMA, GSM/GPRS/EDGE receiver front-end without inter-stage

������������������ SAW filter in 90nm CMOS

 

Presenter :  Naveen Yanduru, MGTS, Texas Instruments Inc, Dallas, TX

Date�������� :Thursday June 21, 2007. 6:30pm, Refreshments - Pizza & Drinks ; 7:00pm, Program

Location�� : Dallas Texins Activities Center, Conf Room 1 (North end of  Texas Instruments expressway site, 13900 N Central Expw.; site  entrance on north-bound access road, between Midpark Rd. & Spring Valley Rd.)

Abstract:

����������������� Multiple RF bands, modulation schemes, duplex mechanisms and signal bandwidths needed for the various standards for the mobile terminal, call for a highly reconfigurable RF receiver. Designing a �multi-mode� RF receiver for a given RF band with highly reconfigurable performance is thus important. FDD based standards such as WCDMA demand high linearity and normally require a SAW filter between LNA and mixer. TDD based standards like EDGE do not have the same challenges. A WCDMA/EDGE receiver without inter-stage SAW filter in 90nm CMOS is used as an example in illustrating the architecture, circuit and system considerations for such a receiver. However, to achieve a true Software Defined Radio receiver, the RF pre-select filter forms a bottleneck in terms of achieving a �multi-band� receiver. A few of the possible architectures for a multi-band receiver and their limitations are presented.

 

Brief Biography

������������� Naveen Yanduru serves as Receiver Design Manager and a Member Group Technical Staff at Texas Instruments, Inc.While at TI he has led several RF receiver design teams and projects for various cellular standards including GSM, WCDMA, TDSCDMA and GPS.�� Most recently, he served as an architect and led the design of a dual mode UMTS (WCDMA, EDGE) receiver in 90nm CMOS that did not require an external inter-stage filter.

����������������� His research interests include multi-mode, multi-band receiver front-ends in deep submicron CMOS, quantifying the effect of AM blockers on RF receiver performance and design of on-chip RF filters.He has more than 10 years of experience in RF IC design, published over 15 papers in professional journals and international conferences, and holds 6 patents and patent applications. He has given invited talks and workshop tutorials at IEEE conferences including RFIC Symposium.He is a currently Distinguished Lecturer of IEEE-CAS for the term 2007-2008.