The Analog is
the monthly newsletter of the Central
Texas Section
of the Institute of Electrical and Electronic Engineers, Inc. New
issues are published around the first of each month. The deadline
for inclusion of material is the 26th of the month. Send
submissions, comments, questions to John Purvis, Editor, john.purvis@ieee.org. Archives
of The Analog can be found on the CTS web site
here.
From the Central Texas Section Chair
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IEEEXplore
- full text access to IEEE Publications The Spectrum Online - The Magazine for Technology Insiders IEEE Member Newsletter https://theinstitute.ieee.org |
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Topic/Title |
Time Domain’s UltraWideband Ranging Radio and Radar – Concept, Implementation and Applications |
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Speaker |
Alan Petroff, Time Domain, Huntsville, AL Alan Petroff is Principal Technologist at Time Domain. In this role he has two main responsibilities. He introduces the technology to commercial, industrial, governmental and academic users. He also assists end users in evaluating specific applications. Alan is also the Hardware Product Manager for Time Domain’s platforms. He received his BSEE from Cornell University in 1974 and holds approximately 20 patents. |
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Abstract |
In this talk, I will describe and demonstrate the
operation of Time Domain’s UltraWideband (UWB) RF platform. The
discussion includes: principles of operation, characteristic
advantages, two-way time-of-flight range measurement, example
commercial applications, current academic research areas, and use in
undergraduate education. The discussion also includes two short
videos. The first shows the operation of a multi-static radar
used as a virtual fence to detect, localize, track and characterize
targets. The second shows the ranging capability used in a number of
robotic applications. The presentation will conclude with a
demonstration of UWB platforms in operation as a radar, ranging
platform and network. |
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Date/Time |
April 18, 2014, 10:30 am |
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Cost |
Free |
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Location |
POB 2.402, University of Texas at Austin |
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Notes |
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Topic/Title |
System C Tutorial |
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Speaker |
Bill Bunton from LSI |
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Abstract |
Over recent years the EDA community has embraced
Electronic System Level (ESL) design flow, SystemC, Transaction Level
Modeling (TLM) and High Level Synthesis (HLS). Today all major
EDA vendors provide the tools needed for an ESL design-flow. With
the tools available design teams need to develop a flow that provides
early return on investment, creates a foundation for the next
generation of products and do this with minimum disruption of the
existing designs and design-flow. This presentation will explore the most common ESL use-cases and their relation to traditional SoC design flow. An example ESL design-flow identifies the opportunities and challenges as a team’s traditional design-flow evolves to an ESL flow that includes architecture, hardware, design-verification and software. The common ESL use-cases include early architectural exploration, performance modeling, virtual system prototypes, shared functional verification, and high level synthesis. |
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Date/Time |
April 8, 2014, 6 to 9 pm |
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Cost |
Free |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/24833 |
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Location |
Building: Building A, (Previous Freescale auditorium) Room Number: Auditorium 7700 W Parmer Ln. Austin, Texas |
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Topic/Title |
Data Mining in Design and Test - Principles and Practices |
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Speaker |
Li-C. Wang of University of California, Santa Barbara Li-C. Wang is professor of ECE department at UC-Santa Barbara. He received Ph.D. in 1996 from University of Texas at Austin. He was a senior CAD software technical staff member at Somerset PowerPC Design Center, Motorola from 1996 to 2000, where he led various projects for PowerPC microprocessor test and verification. Dr. Wang received best paper awards from DATE-1998, IEEE VTS-1999, and DATE-2003. He is the recipient of the Technical Excellence Award from Semiconductor Research Cooperation (SRC) in 2010 for his contribution on developing data mining technologies in the areas of test and validation. He co-founded the IEEE Microprocessor Test and Verification (MTV) Workshop, and is currently the program co-chair. He is currently serving or had served as technical PC member for various workshops and conferences including ITC, VTS, ICCAD, DATE, DAC, ISQED, HLDVT, ITSW, DATA, ATS, ICCD, VLSI-DAT, etc and is currently serving as the general co-chair for VLSI-DAT. He is an associate editor of IEEE Trans. on CAD and also guest editors of a number of D&T special issues. From 2005, his research group has published more than 60 papers on the topics of applying data mining and machine learning in test, verification and validation. |
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Abstract |
This tutorial teaches the principles of various data
mining approaches and explains application examples to illustrate how
these approaches can be applied in solving design and test problems in
practice. We will cover machine learning topics such classification,
regression, novelty detection and rule learning, and explain their
working principles. We will present examples of applying specific
learning technique in design and test contexts. Experience of
developing a practical data mining flow will be presented. Promises of
applying data mining in practice will be demonstrated through positive
experimental results based on industrial settings. The tutorial is
intended for engineers, researchers, and managers who are interested in
understanding data mining and machine learning and how they can be
applied in design and test in practice. Tutorial will teach the
knowledge for someone interested in pursuing a learning approach in
their respective application context and/or interested in assessing the
potential of data mining that can be brought to their research and
development effort. |
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Date/Time |
April 16, 2014, 6 to 9 pm |
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Cost |
Free |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/24719 |
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Location |
Building: Building A, (Previous Freescale auditorium) Room Number: Auditorium 7700 W Parmer Ln. Austin, Texas |
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Notes |
The CEDA chapter normally meet on the 3rd Thursday of every month. This meeting is open to the public and interested parties. Additional details will be posted at the website. If you have any questions about this meeting or this group, please contact zhuoli@ieee.org.
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Topic/Title |
VLSI Architectures for Communications and Signal
Processing |
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Speaker |
Kiran Gunnam , Ph.D of Violin Memory Kiran Gunnam received the MSEE and PhD in Computer Engineering from Texas A&M University, College Station, TX. He currently works as Director of Engineering at Violin Memory. He previously held research and development positions at Nvidia, Certicom, LSI, Marvell Semiconductor, Starvision Technologies, Schlumberger, Intel and Texas Engineering Experiment Station. Dr. Gunnam has extensive research and development work experience in complex data path and control path systems. Dr. Gunnam is an expert in IC implementation of communications and signal processing systems. His PhD research contributed several key innovations in advanced error correction systems based on low-density parity- check codes (LDPC) and led to several industry designs. He has done extensive work on ASIC hardware architecture, micro-architecture and digital IC implementation for different systems (IEEE 802.11n Wi-Fi, IEEE 802.16e WiMax, IEEE 802.3 10-GB, Holographic read channel, HDD read channel and Flash read channel). Dr. Gunnam has around 75 patents/patent applications/invention disclosures on hardware architecture and micro-architecture (46 issued patents, 4 pending patent applications and 25 more invention disclosures). He is the lead inventor/sole inventor for 90% of them. He is an IEEE Senior Member. He is also an IEEE Solid State Circuits Society Distinguished Lecturer for 2013 and 2014. |
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Abstract |
Part 1 of this lecture covers introduction to VLSI
architectures for Communications and Signal Processing Systems. Various
topics include pipelining and parallel processing, retiming, unfolding,
folding, systolic architecture design and algorithmic transformations.
The emphasis is how to design high-speed, low-area, and low-power VLSI
systems for a broad range of DSP and communication applications. Part 2
of this lecture covers speaker’s research. Low-Density Parity-Check
codes now have been firmly established as coding technique for
communication and storage channels. This talk gives an overview of the
speaker’s research and contributions in the development of low
complexity iterative LDPC solutions for Turbo Equalization for magnetic
recording storage channels. Complexity is reduced by developing new or
modified algorithms and new hardware architectures viz. system level
hardware architecture, statistical buffer management and queuing,
local-global interleaver, LDPC decoder and error floor mitigation
schemes. |
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Date/Time |
21-April-2014 6:00 to 6:15 pm -- Networking and refreshments (pizza and water) 6:15 to 8:00 pm – Seminar |
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Cost |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/25155 |
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Location |
Building: ACES (or POB) 2.402 201 East 24th St Austin, Texas |
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Notes |
This is one of the April 2014 seminar of IEEE Central
Texas CAS/SSC Chapter. It is a Distinguished Lecturer from the SSCS. |
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Topic/Title |
Scaling Analog and RF Circuits: Why and How |
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Speaker |
Peter Kinget , Ph.D Prof. Peter R. Kinget finished a dual electrical and mechanical engineering degree and a PhD degree in electrical engineering from the Katholieke Universiteit Leuven, Belgium, in 1990 and 1996, respectively. From 1996 to 1999, he was at Bell Laboratories, Lucent Technologies, in Murray Hill, NJ, as a Member of Technical Staff in the Design Principles Department. From 1999 to 2002 he held various technical and management positions in IC design and development at Broadcom, CeLight and MultiLink. In 2002, he joined the faculty of Columbia University. His research interests are in analog, RF and power integrated circuits and the applications they enable in communications, sensing, and power management. Dr. Kinget is a Fellow of the IEEE. He has been a "Distinguished Lecturer" for the IEEE Solid-State Circuits Society. He is a co-recipient of the "Best Student Paper Award - 1st Place" at the 2008 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, of the "First Prize" in the 2009 Vodafone Americas Foundation Wireless Innovation Challenge, of the "Best Student Demo Award" at the 2011 ACM Conference on Embedded Networked Sensor Systems (ACM SenSys), of the "2011 IEEE Communications Society Award for Advances in Communication" for an outstanding paper in any IEEE Communications Society publication in the past 15 years, and of the "First Prize ($100K)" in the 2012 Interdigital Innovation Challenge (I2C). |
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Abstract |
CMOS technology scaling has fueled tremendous progress
in electronics and has brought about system-on-chip (SoC) products with
a broad impact on our society and economy. Technology scaling is very
beneficial to increase the performance and density for digital signal
processing, computation and memory. Analog and radio-frequency (RF)
circuits remain the critical interfaces to connect the digital cores of
SoCs to the physical world and need to satisfy increasing performance
demands. At the same time, designing analog and RF functions with
scaled devices and reducing supply voltages is getting progressively
harder. Meeting more stringent performance requirements with poorer
analog devices makes the task of the analog designer very challenging
and interesting. We will review scaling challenges for analog circuit
performance and contrast them to digital circuit scaling. We will
further discuss design paradigms that address analog and RF circuit
scaling, including mixed-domain analog techniques. The talk will also
touch upon the novel application opportunities that scaled CMOS
technologies enable. We will illustrate how exploiting high speed
transistors can enable ultra-low power wireless communications for
applications such as building an Internet of Things with energy
harvesting active networked tags. |
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Date/Time |
02-April-2014 9:30-10:30pm talk |
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Location |
Building: ACES (or POB) 2.402 201 East 24th St Austin, Texas |
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No meeting scheduled at this time |
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| Topic/Title | 9th Annual Student Night – Come and hear what local
students are up to! |
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| Speaker | Students from Local Universities |
| Abstract | This is usually a very popular program! The
students will have stations around the perimeter of the room and we
will informally and independently walk to each station to see and hear
what the student has to present. Often the students have the
results of their Senior Design Project. The variety and scope of
what they have accomplished In a relatively short period of time is
really impressive and a pleasure to see. One station will be for
the free pizza that will be served throughout the program. Our
members and the students can chat while they enjoy the pizza. |
| Date/Time | Tuesday, April 29th, 2014; Program Starts at 6:30 pm |
| Location | Conference Room B, University Center, St. Mary’s
University, San Antonio, TX |
| Cost | No Cost. Pizza provided at no cost to you. |
| Reservations | Not Required, but to help with estimates of pizza
needed please email Dr. Djaffer Ibaroudene, dibaroudende@stmarytx.edu
, or call (210) 431-2050 |
| Notes |
See our website for directions and parking, https://www.ieee-cs-cts.org You can see more about this meeting at: https://meetings.vtools.ieee.org/meeting_view/list_meeting/25295 |
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| Topic/Title | Human Factors and Ergonomics |
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| Speaker | Dan E. Kolar, Ph.D. CHFP, Manufacturing Procedures
Analyst and Consultant |
| Speaker Bio | Dr. Kolar started with IBM in Chicago as a Customer
Engineer, maintaining electro-mechanical banking machines. After
completing his PhD. he worked in Austin’s Product Test Department when
the technology was changing from Mag Card typewriters to electronic
word processors. He conducted human factors usability tests by hiring
potential users of the products and watching how they interacted with
the machines. In the Product Development Laboratory responsibilities
included testing, evaluating and creating new procedures to overcome
usability problems. Two human factors based procedures resulted in a
$320 M cost avoidance. He is the author of several IBM Technical
Reports, user documentation and "How to Love Your Computer without
Cursing the Cursor." |
| Abstract | Dr. Kolar’s undergraduate work in mechanical
engineering and Ph.D. in Industrial Psychology from the Illinois
Institute of Technology gave him the ability to understand how things
work, and how people interact with those things. Clever designs do not
equate to usable products. We have all bumped our heads into "pull to
open" doors expecting them to be "push to open" doors. Bumping one’s
head is a minor embarrassment. However, when ego driven designers
choose to use introspection, rather than consult a human factors
professional, things can go very wrong very quickly. Not understanding
the behavioral characteristics of the consumer audience can result in
death and destruction. Tonight’s presentation will show many examples
of how and why Human Factors is so important to our safety and sanity. |
| Date | April 23, 6:30 p. m. |
| Location | PoK-e-Jo's Restaurant, 2121 W. Parmer Lane at Lamplight
Village, Austin TX 78727 |
| Cost | $5 minimum cost for restaurant, supper optional at
extra cost. |
| Reservations | Not required. All interested parties are invited
to attend. For more information, go to: https://www.ewh.ieee.org/r5/central_texas/cn/index.html |
| Notes |
Do a friend a favor. Bring your colleagues to grow the Consultants Network.
More information on Consultants Networks: https://www.ieeeusa.org/business/whatis.asp
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Topic/title |
Signal Integrity Parameters, Characterization, and Techniques |
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Speaker |
Jay Diepenbrock, Lorom America |
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Abstract |
This presentation will focus on the key electrical
parameters that are important to understand and measure for ensuring
optimum performance in today’s high speed serial communications
interfaces. These include fundamental quantities such as inductance,
capacitance, and propagation delay as well as “derived” quantities of
impedance, insertion and return loss, skew, crosstalk, etc. Software
tools for extracting these parameters will also be discussed. Intended Audience: Hardware engineers, Signal Integrity engineers, EMC engineers. |
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Date/time |
Wednesday, April 9, 2014. 6:30-7:00PM social/food,
7:00-9:00pm program |
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Location |
National Instruments, Building C, 11500 N. Mopac Expwy,
Austin, TX, 78759 |
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Cost |
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Reservations |
Not necessary https://meetings.vtools.ieee.org/meeting_view/list_meeting/24599 |
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Notes |
Food and refreshments are provided See the EMC Society Chapter web site for more information and directions. This meeting is open to the public. |
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More information on GOLD: https://www.ieee.org/membership_services/membership/gold/index.html
GOLD Launches Mentoring
Connection Webinar
Are you interested in becoming a mentor
or finding a mentor to help with your professional
development?
If the
answer is yes, check out a free new IEEE Graduates of the Last Decade
(GOLD) webinar aimed at
helping mentors and mentees connect with each other. Learn more at https://bmsmail3.ieee.org:80/u/17953/32170
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We will have no I&M meeting in April. |
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No meeting scheduled at this time.
For more information, contact Mikhail Belkin
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For information email Tom
Grim |
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| Topic/Title | A tour of the Pecan Street's Pike Powers Lab |
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| Speaker | Scott Hinson |
| Abstract | A tour of the Pecan Street's Pike Powers Lab. The Pike
Powers Laboratory and Center for Commercialization offers specialized
capabilities for developing, testing and validating consumer
electronics and applications that incorporate metrology, building
controls, solar PV, natural gas fuel cell, machine-to-machine, vehicle
charging and disaggregation technologies. Additional Information: - This tour is currently capped at 40 people, please RSVP to ensure that you will be able to attend. A second tour may be opened up if there is enough interest. - There is no charge to attend and you do not need to be a member of IEEE. - Kids over 8 will be allowed on the tour if they are accompanied by an adult and are on the RSVP list. - Tour information may change after you register; please watch your email for updates. |
| Date/Time | 19-April-2014 09:00AM to 11:00AM |
| Location | 3924 Berkman Drive Austin, Texas |
| Cost | |
| Reservations | https://meetings.vtools.ieee.org/meeting_view/list_meeting/24145 |
| Notes |
| Topic/Title | Plug-In Electric Vehicles |
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| Speaker | Dave Tuttle Dave Tuttle is presently a Research Fellow and PhD student in renewable energy systems, the integration of Plug-In Vehicles and the grid, and the Smartgrid in the Electrical and Computer Engineering department at the University of Texas at Austin. He joined IBM R&D with B.S. and Master of Engineering degrees in Electrical Engineering with Highest Honors from the University of Louisville. He was one of the original designers and technical team leaders of the POWER1 microprocessor which launched IBM's UNIX/RISC systems. After POWER1, he completed his MBA at UT-Austin with the Dean’s Award for academic excellence. He then led the joint Apple/IBM/Motorola team which designed the first PowerPC microprocessor that launched the Apple PowerMac and IBM PowerPC based systems. He went on to lead multiple R&D teams responsible for high speed fiber optic based adapters & switches, the POWER2-SC microprocessor (used in the 1997 IBM Deep Blue chess playing Supercomputer which beat World Chess Champion Garry Kasparov), and other advanced processors and systems. Dave was then recruited by Sun Microsystems to build an Austin design center from scratch. He also helped steer Sun’s processor roadmap to develop more energy efficient Chip Multithreading architectures. From 2006 to 2007 he was the team manager of the University of Texas DARPA Urban Challenge autonomous vehicle team and an adviser to the UT-Austin Mechanical Engineering Department of Energy/ChallengeX hybrid vehicle development team. Today, he is one of the researchers in Austin’s Pecan Street Consortium/University of Texas Plug-In Vehicle and Smartgrid research project. |
| Abstract | With the advancement of battery, power electronics, and
automotive powertrain architecture technologies, viable mass market
plug-in electric vehicles (PEVs) are now on the roads today. Electric
drive can provide numerous benefits to a driver and to the U.S. PEVs
can reduce the U.S. dependency on foreign oil, greatly improve energy
security, reduce the imported-oil related trade deficit, lower
operating costs, lower emissions, and reduce U.S. energy-related
geopolitical entanglements. Electric vehicle topics that will be
covered in this presentation include: the types of electric vehicles,
electric vehicle charging/refueling, and the synergies between electric
vehicles and electricity grid. |
| Date/Time | 22-April-2014 6:00 to 6:30 PM Social 6:30 to 7:00 PM Dinner 7:00 to 7:30 PM Business Meeting 7:30 to 8:30 PM Program 9:00 PM room closes for the benefit of long distance drivers and early risers |
| Location | El Gallo Mexican Restaurant, 512-444-2205 2910 S
Congress (directions below) Austin, Texas |
| Cost | Choose from a select menu of soups, salads and dinner
plates. Cost: • IEEE Members and accompanying spouses: $11 to $17 for dinners ($2 non-meal participants) • Visitors (non-IEEE members): $14 to $20 for dinners ($5 non-meal participants) • IEEE Student Members: $3 for dinner (no charge for non-meal participants) • Student Visitors (non-IEEE members): $6 to $10 for dinners ($2 non-meal participants) • All: $2 for non-alcoholic beverages • A bar is available for those who care to purchase a beer or other alcoholic beverage |
| Reservations | https://meetings.vtools.ieee.org/meeting_view/list_meeting/24131 |
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| Topic/Title | No meeting scheduled at this time |
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| Topic/Title | Wearable Electronic Technology |
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| Speaker | Joseph Wei Joseph Wei is the founder of SJW Consulting, Inc., he consults on wearable, cloud and IoT product strategy, investment and partnerships. He is a Senior Member of IEEE, serves as the Chair of the IEEE Consumer Electronics Society Santa Clara Valley. He is also the co-organizer of the Silicon Valley Wearable and Connected Device Meetup. Prior to his consulting practice, he held executive positions at Inventec, Amphus, SGI, NEC and DEC. He is recognized for creating the Linux Clustering group at SGI that led the enterprise adoption of Linux applications as well as his early work in the development of blade servers while working at Amphus. |
| Abstract | This presentation will be based on a recent article
authored by Mr. Joseph Wei to be published in the IEEE Consumer
Electronics magazine. Wearable, Cloud and the Internet of Things (IoT) are the hottest technology markets in the recent years. Cloud has been around longer since the introduction of Amazon EC2 in 2006, Wearable and IoT are just beginning to take shape while their applications and usage models are still being defined. According to a new market report published by Transparency Market Research "Wearable Technology Market - Global Scenario, Trends, Industry Analysis, Size, Share and Forecast, 2012- 2018" the global wearable technology market is expected to grow from USD 750.0 million in 2012 to USD 5.8 billion in 2018. While some of the wearable and IoT devices will directly connected to the cloud, some won’t depending on the usage and the business models. The high rate of growth of wearable and IoT are fueled by new low power processors, MEMS and wireless technologies such as ARM SoC, gyro, Bluetooth Smart, 4G, etc. |
| Date/Time | April 15, 2014 6:30
- 8:00pm |
| Cost | |
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| Location | Dell Parmer Campus, Parmer South Building 4, Victoria
Conference Room |
| Notes |
We encourage you, others in your organization, or other interested parties to participate in our meetings. The PSES meets on the third Tuesday of every month at 6:30pm, with the program starting at 7:00pm. For further information about the PSES, please contact Dale Ritzen at (512) 651-5338.
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Topic/Title |
Aging, Brain Science, and the Future of Health Care |
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Speaker |
Wayne is the Founder and Senior Editor of Modern Health
Talk, where he writes about tech solutions for keeping seniors safe at
home and avoiding costly institutional care. As a retired technologist,
futurist and marketer with IBM, Dell, Siemens and his own consulting
firm, Wayne knows the positive effect digital technologies can have on
society and the challenges of adopting them. He introduced IBM to the
Digital Home market and only left after the company got out of consumer
markets. After IBM, Wayne established CAZITech Consulting, held
leadership roles in Wireless & Home Gateway standards
organizations, volunteered with the FCC Consumer Advisory Committee,
successfully lobbied the Texas legislature to protect the rights of
municipalities to install public Wi-Fi networks, co-founded a nonprofit
consumer advocacy to enact new consumer protection laws and abolish an
abusive state agency, and founded Modern Health Talk. These days, Wayne
is also helping a colleague launch a new sleep wellness business. |
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Abstract |
While it’s important to live longer, it’s even more
important to live well. This talk looks at the future of health care
from several perspectives. First is the demographic of aging baby
boomers who are living longer but aren’t necessarily healthy and the
effect that will have on our healthcare system. Next is the
effect that Moore’s Law and shrinking circuits will have on improving
care and reducing costs. And the final segment explores the convergence
of engineering, computer science, physics, chemistry and mathematics
with cellular, molecular, cognitive and behavioral neurosciences, based
on my interview with Dr. Metin Akay, who spoke to this group several
months ago. Dr. Akay is Founding Chairman of the new Biomedical
Engineering Department and the John S. Dunn professor of biomedical
engineering at the University of Houston. |
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Date/Time |
17-April-2014 06:00PM to 09:00PM |
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Location |
AT&T Labs , 9505 Arboretum, Austin,
Texas 78729 |
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Reservations |
https://meetings.vtools.ieee.org/meeting_view/list_meeting/24445 |
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Notes |
For further information, please contact IEEE COMSOC/SP
Austin Chapter Chair Fawzi Behmann at f.behmann@ieee.org |
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For further
information, contact David Akopian david.akopian@utsa.edu |
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| Topic/Title | Engineering Your Career |
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| Speaker | |
| Abstract | Some concrete and specific tips to help you strengthen
and build your career while making it a more satisfying experience. |
| Date/Time | Thursday, April 3, 2014, noon – 1 |
| Location | LCRA, Lake Austin Blvd. |
| Cost | |
| Registration | https://meetings.vtools.ieee.org/meeting_view/list_meeting/24517 |
| Notes | Joint meeting with WIE |
Contact Leslie Martinich (lmartinich@ieee.org) for more information about the Austin TMC.
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| Topic/Title | Engineering Your Career |
|
|---|---|---|
| Speaker | ||
| Abstract | Some concrete and specific tips to help you strengthen
and build your career while making it a more satisfying experience. |
|
| Date/Time | Thursday, April 3, 2014, noon – 1 |
|
| Location | LCRA, Lake Austin Blvd. |
|
| Cost | ||
| Registration | https://meetings.vtools.ieee.org/meeting_view/list_meeting/24517 |
|
| Notes | Joint meeting with Austin Technology Management Council |
Contact Leslie Martinich (lmartinich@ieee.org) for more information about the Austin TMC.
IEEE Conference Search can be found at https://www.ieee.org/web/conferences/search/index.html
See also https://www.wikicfp.com - A place to organize and share Calls for Papers.
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