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Technical
Seminar |
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Gbps
Optical Receivers with CMOS Integrated Photodetectors |
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DATE/TIME
Wednesday, February 2, 2011 (3:00pm to 4:30pm) |
PLACE
AMD Fort Collins Campus (Fort
Collins, CO)
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DIRECTIONS
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From I-25, take Harmony Road Exit (Exit 265) westbound, and enter AMD
campus on right immediately following Harmony/Ziegler intersection.
AMD is located on the NW corner of Harmony Road and Ziegler Road.
Proceed to 3rd floor for escort to seminar auditorium. Non-AMD
employees: please arrive at 2:45pm for security sign-in and escort. |
COST
Free. As always, food &
drinks will be provided. |
RSVP
Send e-mail to
steven.martin@avagotech.com. |
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ABSTRACT |
There has
been significant recent progress towards the realization of multi-Gbps
optical receivers fully integrated into standard CMOS processes.
Consider how the emergence of
CMOS image sensors in the 90's revolutionized and proliferated digital
cameras. Likewise, CMOS photodetectors enable highly-integrated,
compact, and low cost optical receivers
opening up new applications for multi-Gbps optical links in data
centers, consumer electronics, and automotive. |
Past work on has focused on using the pn-junctions and
depletion regions available in a standard CMOS process to eliminate,
minimize, or cancel the slowly diffusing photocarriers that usually
limit the bandwidth of CMOS photodetectors. However, if considered
simply as a form of ISI, the slowly diffusing carriers can be dealt with
using the same signal processing tools in wide use for other wireline
communication applications, including decision feedback
equalization. A combination of spatially-modulated light detection,
analog equalization, and modest decision feedback equalization appears
to offer a path towards data rates in
excess of 10-Gbps using integrated photodetectors. Nanoscale CMOS is
particularly well suited to the implementation of such signal processing
functions. |
PRESENTATION SLIDES
pdf |
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PROF. TONY CHAN
CARUSONE (University of Toronto, Canada)
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Tony Chan
Carusone completed the BASc and PhD degrees at the University of
Toronto in 1997 and 2002 respectively. Since 2001, he has been with the
Department of Electrical and Computer Engineering at the University of
Toronto where he is currently an Associate Professor. He has been a
visiting researcher at the University of Pavia, Italy and at the
Circuits Research Lab of Intel Corp., Hillsboro, Oregon. Prof. Chan
Carusone was a co-author of the best student papers at both the 2007 and
2008 Custom Integrated Circuits Conferences and the best paper at the
2005 Compound Semiconductor Integrated Circuits Symposium. He served on
the technical program committee of the Custom Integrated Circuits
Conference, and is now a member of the VLSI Circuits Symposium technical
program committee. He served on the editorial board of the IEEE
Transactions on Circuits and Systems II: Express Briefs from 2006 until
2009 when he was Editor-in-Chief, and is now an associate editor for the
IEEE Journal of Solid-State Circuits. |
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