Thursday, September 27th,
Testing of Core-Based System-on-Chip Integrated Circuits
Abstract: The popularity
of system-on-chip (SOC) integrated circuits has led to an unprecedented
increase in test costs. This increase can be attributed to the difficulty
of test access to embedded cores, as well as long test development
and test application times. This talk will present design-for-testability
techniques that facilitate low-cost SOC test. Topics to be covered
include the recent IEEE 1500 standard for testing core-based SOCs
and techniques for modular testing of digital SOCs. Test planning
methods that involve the use of wrappers and test access mechanisms
will be discussed. Test scheduling techniques for the concurrent
testing of embedded cores at the SOC level will also be presented.
Together, these techniques offer SOC integrators with the necessary
means to manage test complexity and reduce test costs.
Biography: Dr. Krishnendu
Chakrabarty received the B. Tech. degree from the Indian Institute
of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees
from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively,
all in Computer Science and Engineering. He is now Professor of
Electrical and Computer Engineering at Duke University. Dr. Chakrabarty
is a recipient of the National Science Foundation Early Faculty
(CAREER) award, the Office of Naval Research Young Investigator
award, the Humboldt Research Fellowship from the Alexander von Humboldt
Foundation, Germany, and several best papers awards at IEEE conferences.
His current research projects include: testing of system-on-chip
integrated circuits; microfluidic biochips; wireless sensor networks.
He has authored seven books on these topics, and published over
250 papers in journals and refereed conference proceedings.
Prof. Chakrabarty is a Distinguished Visitor of the IEEE Computer
Society for 2005-2007 and a Distinguished Lecturer of the IEEE Circuits
and Systems Society for 2006-2007. He is an Associate Editor of
IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems, IEEE Transactions on VLSI Systems, IEEE Transactions
on Circuits and System I, IEEE Transactions on Biomedical Circuits
and Systems, and ACM Journal on Emerging Technologies in Computing
Systems. He is an Editor of IEEE Design & Test of Computers
and of the Journal of Electronic Testing: Theory and Applications
(JETTA). Prof. Chakrabarty is a senior member of IEEE, a senior
member of ACM, and a member of Sigma Xi.
Social and free snacks:
Place: Da Vinci Connference Room,
Bell+Howell [Company directions]
S Wolf Rd, Wheeling, IL 60090 [Mapquest directions]
at the "Da Vinci" conference room
ED/CAS/SSC Chicago Chapter
March 28th, 2007
Title: Microsystems and
Nanosystems: Manufacturing Challenges and Opportunities
Presenter: Dr. Rajendra
Singh, D.Houser Banks Professor in the Dept. of Electrical and
Computer Engineering and Director of Center for Silicon Nanoelectronics,
Clemson University, SC.
Presented Jointly with:
the Circuits and Systems Society and Solid State Circuits Society,
pictures and the presentation's file,
when either becomes available, go to the meeting's DETAILS.