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May 12 to 15, 2002
Hotel Fort Garry, Winnipeg, Manitoba, Canada
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TECHNICAL PROGRAM

MA2 Oral Session:
Computer Hardware 1
Monday Afternoon, May 13
Time:
Room:		 14h00 - 15h20
Salon AB		 Chairs:
  • A. Sagahyroon
  • S. Tahar
    • MA2.1 (387) 14h00 - 14h20
    Netlist partitioning for FPGA-based run-time reconfiguration
    Dueck, S. and Kinsner, W.
    Department of Electrical and Computer Engineering, Signal and Data Compression Laboratory, University of Manitoba, Winnipeg, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 584-590

    MA2.2 (357) 14h20 - 14h40
    Towards language emptiness model checking for MDGs
    Wang, F. and Tahar, S.
    Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 590-595

    MA2.3 (150) 14h40 - 15h00
    A 54x54-bit multiplier with a new redundant binary Booth's encoding
    Besli, N. and Deshmukh, R.
    Department of Electrical and Computer Engineering, Florida Institute of Technology, Melbourne, USA

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 597-602

    MA2.4 (282) 15h00 - 15h20
    Distributed recovery block based fault-tolerant routing in hypercube networks
    Khan, G., Hura, G.*, and Wei, G.**
    Electrical and Computer Engineering, Ryerson University, Toronto, Canada
    *Computer Science and Computer Engineering, University of Idaho, Idaho Falls, USA
    **Advanced Ion Beam Technology Inc., Sunnyvale, USA

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 2, pp. 603-608



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