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TECHNICAL PROGRAM

MA6 Oral Session:
VLSI Systems
Monday Afternoon, May 13
Time:
Room:		 15h40 - 17h00
Salon AB		 Chairs:
  • W. Badawy
  • P. Khademsamen
    • MA6.1 (285) 15h40 - 16h00
    VLSI prototyping of low-complexity wavelet transform on FPGAs
    Alam, M., Onen, D.*, Badawy, W., and Jullien, G.**
    Department of Electrical and Computer Engineering, University of Calgary, Calgary, Canada
    *SiWorks Inc., Calgary, Canada
    **ATIPS Laboratory, University of Calgary, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 412-415

    MA6.2 (214) 16h00 - 16h20
    A tool for automated analog CMOS layout module generation and placement
    Khademsameni, P. and Syrzycki, M.
    School of Engineering Science, Simon Fraser University, Burnaby, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 416-421

    MA6.3 (182) 16h20 - 16h40
    A novel high-speed trellis-coded modulation codec
    Hu, X. and Dinh, A.
    Department of Electrical Engineering, University of Saskatchewan, Saskatoon, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 422-426

    MA6.4 (367) 16h40 - 17h00
    Minimal test configurations for FPGA local interconnects
    Sun, X., Xu, J., Alimohammad, A., and Trouborst, P.*
    Department of Electrical and Computer Engineering, University of Alberta, Edmonton, Canada
    *Hardware Design Solutions, Nortel Networks, Ottawa, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 427-432



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