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May 12 to 15, 2002
Hotel Fort Garry, Winnipeg, Manitoba, Canada
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TECHNICAL PROGRAM

WA6 Oral Session:
Circuits & Systems
Wednesday Afternoon, May 15
Time:
Room:		 15h40 - 17h00
Salon AB		 Chairs:
  • A. Dinh
  • K. Rachemifar
    • WA6.1 (174) 15h40 - 16h00
    High-speed forward error correction IP blocks for system-on-chip
    Dinh, A. and Bolton, R.
    Department of Electrical Engineering, University of Saskatchewan, Saskatoon, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 515-520

    WA6.2 (268) 16h00 - 16h20
    Highly linear, tunable, pseudo differential transconductor circuit for the design of GM-C filters
    Ghabiya, A. and Syrzycki, M.
    School of Engineering Science, Simon Fraser University, Burnaby, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 521-526

    WA6.3 (123) 16h20 - 16h40
    A simplified decision-directed threshold scheme for EPR4 channel detection
    Omole, I., Maundy, B., and Sesay, A.
    Electrical and Computer Engineering Department, University of Calgary, Calgary, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 527-532

    WA6.4 (421) 16h40 - 17h00
    Unified simulation: A new approach to computer aided circuit analysis
    Gaston, J. and Raahemifar, K.
    Electrical and Computer Engineering Department, Ryerson University, Tornoto, Canada

    IEEE CCECE02 Proceedings; ISBN: 0-7803-7514-9; vol. 1, pp. 533-537



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