PPT Slide

half clock line

frame line

Data-0 line

Data-1 line

Experimental results indicate;

- Low power consumption: 8.4 W

(10.8% lower than that of a previous chip)

- Our chip can be operated in a standard cooling system

in conventional book-shelf assembled PCBs

2 ns/div.

Example output signals from the LSI chip(@ 5 Gbit/s)

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