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CANDE Predictions for the Early 80s


(Predicted in the 1979 at a Signetics Meeting)

In the early 1979, Bill McCalla and Jerry Sullivan, with considerable help from Leo Craft, organized a "structured meeting" to try to predict important trends and technologies for what was then called CAD for IC's. They invited a number of experts to participate in the meeting and the following list was the result. The predictions are shown in order of overall agreement by the group he assembled, with the top eight predictions making the cut. 

When reading the list, you might remember that at that time there were no such things as "personal computers" or "workstations." Virtually all CAD programs ran on mainframes, mostly batch but some using timeshare, and some on minicomputers. So when the first predictions refers to "dedicated processors" (another term used in the meeting was "personal minicomputers") one should note that this prediction recognized the likely evolution of the workstation. In other words, one has to read between the lines because of much of today's technical vocabulary just did not exist yet!

At that time, a few commercial IC CAD tools had been developed beyond circuit simulation, simple layout-rule checking (e.g., NCA), and graphics mask editing (e.g., Calma, Applicon, CV), but not many. Designs were still drawn first on mylar, entered via direct digitization, checked by a batch program, and then (perhaps) edited on an interactive vector-oriented display (usually a Tektronix 4014). Raster displays were very rare things (Xerox PARC and few universities were their most significant advocates.) There were no EDA companies -- Daisy, Valid, and Mentor did not exist. (Editor's Note: Daisy and Valid no longer exist. The trio replaced largely by Cadence, Synopsys and Mentor).
 

Predictions:

1. Design system will be a network formed with dedicated processors for specific functions.

2. Heavy emphasis on testability and test generation during the design phase.

3. Integrated verification tools for checking at each step in the design cycle.

4. Much greater use of canonical circuit forms (PLA, ROM) via design aids.

5. The design station is highly interactive for all phases and includes graphics.

6. Sets of compatible software will be used for design and verification.

7. Circuit and process simulation programs are closely linked to an ongoing process data storage system.

8. Layout will be manipulated in symbolic form.


 Commentary: (9/2001)

Well it appears that 1, 2 just did not happen. General purpose processors (and OS) are norm of the day. Test remains on the other side of the wall. 3, 4, 5, 6 seem have been right on the money. PLA, ROMs were popular for quite a while, and there seems to be a starting trend towards structured logic blocks (to address growing SOC complexity), something that seems to have been recognized in several predictions made in 2001.6, 7 are partially true, not quite the vision that the predictors apparently had in mind. Despite early excitement, 8 did not come through -- and now every attempt is to move away from manual manipulation of the layout anyway.