2019 IEEE CAS Singapore Chapter Talks and Seminars

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Gradient-free Learning based on the Kernel and the Range Space

Prof. Kar-Ann Toh, Yonsei University, Seoul, Korea

Organized by EXQUISITUS, Centre for System Intelligence and Efficiency & IEEE Industrial Electronics Singapore Chapter & IEEE Circuits and Systems Singapore Chapter

Date : 23 January 2019 (Wednesday)
Time : 3.00 PM
Venue : Meeting Room C (S1-B1c-111), School of EEE, NTU

Abstract

In this talk, we show that solving the system of linear equations by manipulating the kernel and the range space is equivalent to solving the problem of least squares error approximation. This establishes the ground for a gradient-free learning search when the system can be expressed in the form of a linear matrix equation. When the nonlinear activation function is invertible, the learning problem of a fully-connected multilayer feedforward neural network can be adapted for this novel learning framework. By a series of kernel and range space manipulations, it turns out that such a network learning boils down to solving a set of cross-coupling equations. By having the weights deterministically or randomly initialized, the equations can be decoupled and the network solution shows relatively good learning capability for real world data sets of small to moderate dimensions. Based on the structural information of the matrix equation, the network representation is found to be dependent on the number of data samples and the output dimension.

Speaker Biography

http://mi.yonsei.ac.kr/_/rsrc/1472851203655/professor/KA_Toh.gifKar-Ann Toh is a Professor in the School of Electrical and Electronic Engineering at Yonsei University, South Korea. He received the PhD degree from Nanyang Technological University (NTU), Singapore. Since then, he worked for two years in the aerospace industry prior to his post-doctoral appointments at research centers in NTU from 1998 to 2002. He was affiliated with the Institute for Infocomm Research in Singapore from 2002 to 2005 prior to his current appointment in Korea. His research interests include pattern classification, machine learning, neural networks and biometrics. He is a co-inventor of two US patents and has made several PCT filings related to biometric applications. Besides being active in publications, Dr. Toh has served as an advisor/co-chair/member of technical program committee for international conferences related to biometrics and artificial intelligence. He is/has serving/served as an Associate Editor of several international journals including IEEE Transactions on Biometrics, Behavior and Identity Science, IEEE Transactions on Information Forensics and Security, Journal of Franklin Institute, Pattern Recognition Letters, and IET Biometrics.

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Enhancing Deep BP Learning with Omnipresent Supervision Training Paradigm

Prof. SY Kung, Princeton University

Organized by Department of Electrical and Computer Engineering, NUS & IEEE Circuits and Systems Singapore Chapter

Date : 29 January 2019 (Tuesday)
Time : 11.00 AM - 12.00 PM
Venue : EA-06-03, Engineering Block EA, Faculty of Engineering, NUS

Abstract

AI2.0 relies on Deep Learning Networks (DLNs) so that both ConvNet and MLP parameters may be collectively learned via the back-propagation (BP) learning, using regression-based metrics. However, the conventional BP on DLNs is constantly haunted by the curse of depth. To counteract this problem, we propose an Omni-present Supervision (OS) learning paradigm. This paradigm is based on classification-based metrics with two motivations: (a) it is biologically inspired (human brains constantly retiring thousands of neurons daily) and (b) it rings well with "Explainable AI" (XAI) championed by DARPA. Both stress interpretability of internal hidden neurons. Along this vein, we develop an EM-type BPOS learning algorithm, alternating between two steps: (i) Net Updating to trim hidden neurons via the internal OS learning and (ii) Weight Updating via external BP learning. We shall showcase our experimental studies demonstrating that BPOS can indeed deliver improved accuracy with substantial hardware saving, i.e. it has the best of the two worlds.

Speaker Biography

Sun-Yuan Kung, Life Fellow of IEEE, is a Professor at Department of Electrical Engineering in Princeton University. His research areas include multimedia information processing, machine learning, systematic design of deep learning networks, VLSI array processors, and compressive privacy. He was a founding member of several Technical Committees (TC) of the IEEE Signal Processing Society. He was elected to Fellow in 1988 and served as a Member of the Board of Governors of the IEEE Signal Processing Society (1989-1991). He was a recipient of IEEE Signal Processing Society's Technical Achievement Award for the contributions on "parallel processing and neural network algorithms for signal processing" (1992); SPS Distinguished Lecturer (1994); IEEE SPS Best Paper Award; and IEEE Third Millennium Medal (2000). Since 1990, he has been the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. He has authored 5 textbooks, the most recent being ``Kernel Methods and Machine Learning”, Cambridge University Press (2014).

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Systematical Design Methodology of Deep Learning Networks

Prof. SY Kung, Princeton University

Organized by College of Engineering Distinguished Speaker Lecture Series, NTU & IEEE Circuits and Systems Singapore Chapter

Date : 30 January 2019 (Wednesday)
Time : 10.00 AM - 11.00 AM
Venue : SCSE Meeting Room, N4-2A-35, NTU

Abstract

Despite of the promising versatility of Deep Learning Networks (DLNs, they have been viewed as ad-hoc learning techniques. This prompts us to explore methodic and systematic design of (deep) machine learning models. Machine learning may be viewed from two angles: On one hand, memorization can be viewed simply as a pure optimization problem to maximize the Training Accuracy based on the training dataset. Via the Universal Approximator (UA) theorem, a perfect training accuracy is always attainable for any arbitrary kind of data dimension/distribution. On the other hand, generalization involves performance based on unknown (and futuristic) prediction dataset. According to the No Free Lunch (NFL) Theorem, no machine learning algorithm may universally generalize any better than another algorithm. Obviously, NFL is overly pessimistic while UA is too optimistic. It is vital to bridge the discrepancy between the pure optimization and generalization problems which also pave a way to strive for systematic design of DLNs. To this end, this talk will methodically address four primary design gaps/issues (collectively known the DONA gaps): (1) Data-distribution gap, (2) Optimization-metric gap (3) Network capacity gap, and finally (4) Algorithmic gap.

Speaker Biography

Sun-Yuan Kung, Life Fellow of IEEE, is a Professor at Department of Electrical Engineering in Princeton University. His research areas include multimedia information processing, machine learning, systematic design of deep learning networks, VLSI array processors, and compressive privacy. He was a founding member of several Technical Committees (TC) of the IEEE Signal Processing Society. He was elected to Fellow in 1988 and served as a Member of the Board of Governors of the IEEE Signal Processing Society (1989-1991). He was a recipient of IEEE Signal Processing Society's Technical Achievement Award for the contributions on "parallel processing and neural network algorithms for signal processing" (1992); SPS Distinguished Lecturer (1994); IEEE SPS Best Paper Award; and IEEE Third Millennium Medal (2000). Since 1990, he has been the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. He has authored 5 textbooks, the most recent being ``Kernel Methods and Machine Learning”, Cambridge University Press (2014).

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Further Optimization of FRM Filters

Prof. Tapio Saramaki, Tampere University of Technology, Finland

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 22 May 2019 (Wednesday)
Time : 3.00 PM - 4.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), School of EEE, NTU

Abstract

Various approaches to synthesizing finite impulse response (FIR) filters based on the frequency response masking (FRM) technique are considered. Among these FRM FIR filters, interpolated FIR (IFIR) are treated as special cases.

Originally, FRM FIR filters have been synthesized by first designing the masking filters using either linear programming or the Remez algorithm and then the periodic filter. The second approach is based on iteratively designing the masking filter pair (each masking filter pair for multistage designs) and the periodic filter until the difference between successive overall filters is within the given tolerance limits. The third approach is to apply nonlinear optimization. These three approaches are compared with each other in terms of achievable filter complexities and the ability of implementing the resulting filters efficiently in practice.

For IFIR filters, the design is drastically simplified and the overall filter synthesis can be done based on iteratively designing the sub filters using the efficient Remez algorithm.

Finally, it is shown that both FRM and IFIR filters can be designed so that their overall order differs only slightly from those of the direct-form FIR filters, but at the same time, the computational complexity in the filter implementation is significantly reduced

Speaker Biography

Tapio Saramaki was born in Orivesi, Finland, in 1953. He has received the Diploma Engineer (with honors) and Doctor of Technology (with honors) degrees in electrical engineering from the Tampere University of Technology (TUT), Tampere, Finland, in 1978 and 1981, respectively. From 1977, he has held various research and teaching positions at TUT. He was a Professor of Digital Signal Processing and a Docent (Adjunct Professor) of Communications until becoming an Emeritus Professor in 2016.

Dr. Saramaki is also a Co-Founder and a System-Level Designer of VLSI Solution, Finland, specializing in efficient VLSI implementations of both analog and digital signal processing algorithms for various applications. His research interests are in digital signal processing, especially in filter and filter bank design, efficient VLSI implementations of DSP algorithms, and communications application as well as approximation and optimization theories. He has contributed to more than 300 international journals and conference articles as well as more than 10 international book chapters. He holds three worldwide used patents.

Dr. Saramaki is the Fellow of IEEE and the Russian A. S. Popov Society for Radio-Engineering, Electronics, and Communications. He was a recipient of the 1987 and 2007 IEEE Circuits and Systems Society’s Guillemin-Cauer Awards as well as two other best paper awards. He is a founding member of the Median-Free Group International.

He has paid numerous research visits to many international universities. The countries include Argentina, Brazil, Canada, China, India, Norway, Mexico, Singapore, Sweden, and USA. He is a founding member of the Median-Free Group International.

Dr. Saramaki has been actively taking part in many duties to the IEEE Circuits and Systems Society’s DSP Committee by being a Chairman (2002-2004), a Distinguished Lecturer (2002-2003), and a Track or a Co-Track Chair for many ISCAS symposiums (2003-2005 and 2011-2019). Furthermore, he has been on the technical committee of several international conferences including, among others, DSP, DSPA, EUSIPCO, ECCTD, IASTED, ICECS, ISPA, and NORCAS.

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Iterative Learning Control and Its Application on Artificial Pancreas

Prof. Youqing Wang, Beijing University of Chemical Technology, China

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Industrial Electronics Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 07 June 2019 (Friday)
Time : 2.30 PM - 3.30 PM
Venue : Meeting Room b2 (S2-B2b-777), School of EEE, NTU

Abstract

This presentation proposes to utilize advanced control algorithms with insulin pumps and CGM sensors to improve glycemic performance in persons with type 1 diabetes mellitus (T1DM). It is evident that there exist repetitive cycles in glucose-meal-insulin dynamics, e.g., dietary habit and circadian variation of hormone levels. To exploit the repetitive nature of glucose-meal-insulin dynamics, a novel combination of iterative learning control (ILC) and model predictive control (MPC), referred to as learning-type MPC (L-MPC), was recently proposed for closed-loop control of an artificial pancreas by the applicant and his colleagues. Clinical trial results show that L-MPC can learn from an individual’s lifestyle, inducing the glucose control performance to improve from day to day. Theoretically, L-MPC belongs to indirect ILC. This presentation also introduces some stability analysis results for general indirect ILC.

Speaker Biography

证件2Youqing Wang (M’09-SM’12) received the B.S. degree from Shandong University, Jinan, Shandong, China, in 2003, and PhD degree in Control Science and Engineering from Tsinghua University, Beijing, China, in 2008. From 2006 to 2007, he was a Research Assistant at the Department of Chemical Engineering, The Hong Kong University of Science and Technology, Hong Kong. From 2008 to 2010, he was a Senior Investigator at the Department of Chemical Engineering, University of California, Santa Barbara, CA, USA. In 2015, he joined the University of Alberta in Edmonton, AB, Canada, as a Visiting Professor. He is currently a Professor at Beijing University of Chemical Technology, and also Shandong University of Science and Technology and. His research interests include fault-tolerant controls, state monitoring, modeling and control of biomedical processes (e.g., artificial pancreas system), and iterative learning controls. Dr. Wang was a recipient of several research awards, including the Journal of Process Control Survey Paper Prize and ADCHEM2015 Young Author Prize.

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Trend towards SW-defined radar with fully digital antenna

Mr. Erwin de Jong, THALES Solutions Asia, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 20 June 2019 (Thursday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Changing missions and an increasingly more diverse threat set pose more stringent and often contradicting requirements on radar systems in the naval and ground-based domains. The radar trend in these domains to cope with these challenges is towards a fully digital front-end using dual-axis multi-beam combined with a software-defined back-end. The concept of this software-defined radar also yields the possibility of Incremental Capability Upgrades. This allows for more gradual updated, upgraded and added capabilities to the radar system, anticipating the ever faster changing environment.

Speaker Biography

Erwin de Jong has been working with THALES Netherlands for 22 years. He started as radar engineer of tracking radars and fire control radars. Later he was a radar architect, system engineering manager and design authority of multifunction radars and surface surveillance radars. The last two years he headed the Centre of Excellence for Radar and Integrated Sensors at THALES Solutions Asia here in Singapore. In this function he collaborated with the innovative, Singapore ecosystem in the radar domain, including the NTU.

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Neuromorphic computing and its current state-of-art

Dr. Yansong Chua, Institute for Infocomm Research (I2R), A*STAR, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 25 June 2019 (Tuesday)
Time : 10.30 AM - 11.30 AM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

This presentation aims to introduce neuromorphic computing to the broader machine learning/ computer science community. The speaker will discuss, how he thinks it is different from deep learning, why it is necessary (from both learning and hardware perspective), the many challenges it faces, some of the current state-of-art, and where he thinks it should be heading towards.

Speaker Biography

Chua Yansong did his bachelors and Masters at the School of Computing, National University of Singapore. He then went on to do his PhD in Biology (specializing in Computational Neuroscience) at the Bernstein Centre Freiburg, which is affiliated with Albert Ludwig University of Freiburg, Germany. He then joined Institute for Infocomm Research (I2R), A*STAR, as a researcher, before becoming the Principal Investigator of work package 5 under the A*STAR neuromorphic programme, a 4 year programme involving several other research institutes at A*STAR and also faculty members from both National University of Singapore and Nanyang Technological University. He is interested in brain inspired computing, and hopes that machines learn with less labels, are more intelligent, and have a much smaller carbon footprint.

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Computational brain imaging and applications in neuropsychiatric disorders

Assoc Prof. Juan Helen Zhou, Duke-National University of Singapore Medical School, Singapore

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 02 July 2019 (Tuesday)
Time : 3.00 PM - 4.00 PM
Venue : Executive Seminar Room (S2.2-B2-53), NTU

Abstract

Previous work has demonstrated that the spatial patterning of each neurodegenerative disease relates closely to a distinct functional intrinsic connectivity network mapped in the healthy brain with “resting-state” functional MRI. This talk will first describe how brain network-sensitive neuroimaging methods shed light on the vulnerable network-breakdown mechanisms in different neurodegenerative disorders. I will introduce both structural and functional brain imaging methods and the related computational approaches. Our recent findings on how age and disease pathology influence brain structural and functional networks longitudinally in older adults will be described. Moreover, I will present evidence on how multimodal brain imaging can help identify abnormal trajectory in preclinical individuals and predict clinical outcomes. Lastly, complex network modeling approach of brain dynamic functional connectivity associated with human behavior will be briefly described. Further developed with computational and machine learning approaches, multimodal brain imaging signatures will facilitate early detection, disease prognosis and treatment response prediction.

Speaker Biography

Dr. Juan (Helen) Zhou is an Associate Professor at the Center for Cognitive Neuroscience, Neuroscience and Behavioral Disorders Program, Duke-National University of Singapore Medical School, Singapore. She also holds a joint appointment with Clinical Imaging Research Center, NUS. Her lab studies how selective network-based vulnerability is implicated in neuropsychiatric and neurodegenerative disorders using multimodal neuroimaging and computational approaches.

Prior to joining Duke-NUS in 2011, Helen was an associate research scientist at the Child Study Center, New York University. She did a post-doctoral fellowship at the Memory and Aging Center, Department of Neurology, University of California, San Francisco, from 2008 to 2010 and one-year research fellow with Singapore-MIT Alliance in 2007-2008. Helen received her Bachelor degree in Computer Science and Engineering with first class honour in 2003 under the scholarship from the Ministry of Education, Singapore and her Ph.D. in 2008 from School of Computer Science and Engineering, Nanyang Technological University, Singapore.

Helen has published in multiple international peer-reviewed high impact journals such as Neuron, Brain, PNAS, Neurology, Molecular Psychiatry, Biological Psychiatry, Journal of Neuroscience, NeuroImage, Cerebral Cortex and so on. She is the Council member - Secretary and a program committee member of the Organization of Human Brain Mapping, a member of the IEEE, Society for Neuroscience, American Academy of Neurology, and Alzheimer’s Association. Helen also serves as an Editor of NeuroImage and Associate Editor of other journals. Dr. Zhou has been the recipient of research support from National Medical Research Council and Biomedical Research Council, Singapore as well as the Royal Society, UK.

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From RFID to Cyber-Physical Systems: Reality, Dreams, and Fantasy

Prof. Magdy A. Bayoumi, University of Louisiana at Lafayette

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

“Sponsored by the IEEE Council on RFID under its Distinguished Lecturer Program”

Date : 25 July 2019 (Thursday)
Time : 10.00 AM - 11.00 AM
Venue : Meeting Room B1 (S1-B1b-66), NTU

Abstract

The integration of physical systems with networked sensing, computation networks, and embedded control with actuation has led to the emergence of a new generation of engineered systems, the Cyber-Physical Systems (CPS). Such systems emphasize the link between cyber space and physical environment (i.e., time, space, and energy). CPS represents the next generation of complex engineering systems. They are large scale dynamic systems that offer significant processing power while interacting across communication networks.

RFID was one of the early technology that facilitated interfacing the physical world with the cyber space. RFID was mainly developed to monitor and track objects in real time. The RFID applications in CPS systems are more sophisticated and appealing. As a matter of fact the emergence of CPS has given RFID a new life.

CPS will help to solve the grand challenges of our society, such as, aging population, limited resources, sustainability, environment, mobility, security, health care, etc. Applications of CPS cover a wide band of economic, medical, and entertainment sectors. It includes; Transportation: automobiles, avionics, unmanned vehicles and smart roads; Large Scale Critical Infrastructure: bridges, mega buildings, power grid, defense systems; Health Care: medical devices, health management networks, telemedicine; Consumer Electronics: video games, audio/video processing, and mobile communication.

Building Cyber-Physical Systems is not a trivial task. The difficulty arises from the existing gap in modeling and computing of the physical and cyber environments. The design process require new theories, models, and algorithms that unify both environments in one framework. None of the current state-of-the art methods are able to overcome the challenges of developing the unified CPS design paradigm.

Several of these issues will be discussed in this talk. Case studies of real world CPSs will be illustrated.

Speaker Biography

Dr. Magdy A. Bayoumi is the Department Head of W. H. Hall Department of Electrical & Computer Engineering. He is the Hall Endowed Chair in Computer Engineering. He was the Director of the Center for Advanced Computer Studies (CACS) and the Department Head of Computer Science Department. He was. Also, the Loflin Eminent Scholar Endowed Chair in Computer Science, all at the University of Louisiana at Lafayette where he has been a faculty member since 1985. He received B.Sc. and M.Sc. degrees in Electrical Engineering from Cairo University, Egypt; M.Sc. degree in Computer Engineering from Washington University, St. Louis; and Ph.D. degree in Electrical Engineering from the University of Windsor, Canada.

Dr. Bayoumi has graduated about 100 PHD and 150 MSC students, authored/co-authored about 600 research papers and more than 10 books. He was the guest/co-guest editor of more than 10 special journal issues, the latest was on Machine to Machine Interface.

Bayoumi is an IEEE Fellow. He has served in many capacities in the IEEE Computer, Signal Processing, and Circuits & Systems (CAS) societies. Currently, he is the vice president of Technical Activities of IEEE RFID council and he is on the IEEE RFID Distinguished Lecture Program (DLP). He is a member of IEEE IoT Activity Board. Bayoumi has received many awards, among them; the IEEE CAS Education award and the IEEE CAS Distinguished Service award. He was on the IEEE DLP programs for CAS and Computer societies. He was on the IEEE Fellow Selection Committee. Bayoumi has been an ABET evaluator and he was an ABET commissioner and team chair. He has given numerous keynote/invited lectures and talks nationally and internationally.  Bayoumi was the general chair of IEEE ICASSP 2017 in New Orleans. He, also, chaired many conferences including ISCAS 2007, ICIP 2009, and ICECS 2015.

Bayoumi was the chair of an international delegation to China, sponsored by People-to-People Ambassador, 2000. He received the French Government Fellowship, University of Paris Orsay, 2003-2005 and 2009. He was a Visiting Professor at King Saud University. He was a United Nation visiting scholar. He was a visiting professor at University of King Saud. He has been an advisor to many EE/CMPS departments in several countries.

Bayoumi was on the State of Louisiana Comprehensive Energy Policy Committee. He was the vice president of Acadiana Technology Council. He was on the Chamber of Commerce Tourism and Education committees. He was a member of several delegations representing Lafayette to international cities. He was on the Le Centre International Board. He was the general chair of SEASME (an organization of French Speaking cities) conference in Lafayette. He is a member of Lafayette Leadership Institute, he was a founding member of its executive committee. He was a column editor for Lafayette Newspaper; the Daily Advertiser.

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Stereo Video Retargeting: Bringing the Theater Experience into Our Home

Prof. Chia-Wen Lin, National Tsing Hua University, Taiwan

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

“Sponsored by the IEEE Circuits and Systems Society under its Distinguished Lecturer Program”

Date : 07 August 2019 (Wednesday)
Time : 09.30 AM - 10.30 AM
Venue : Meeting Room C (S1-B1C-111), NTU

Abstract

The popularity of stereo images/videos and various VR/AR display devices poses the need of resizing stereo image/video pairs. Nevertheless, traditional resizing methods like uniform scaling and cropping usually lead to annoying shape and depth distortions such as depth change and window violation. Although content-aware retargeting schemers can address such problems, existing content-aware methods often incur conflicts among the requirements on shape, depth, and temporal coherency preservation, thereby failing to meet one or more of these requirements. This can significantly degrade the quality of experience when watching at 3D movie at home. In this talk, we will introduce our recent results on how to simultaneously avoid shape and depth distortions as well as maintain the temporal coherency of shape and depth while resizing a stereo image/video to the desired size. Different from the existing methods, our method effectively avoids the conflicts among depth, shape and temporal-coherency requirements by relaxing the resizing constraints on those regions in a 3D scene that cannot be perceived by human eyes to maintain the temporal coherency of the remaining regions. Based on this new finding, our method employs depth information to derive effective temporal-coherency constraints so as to offer visually pleasing results and achieves significantly better retargeting performance than existing methods, making it possible to bring the theater experience into our home.

Speaker Biography

Chia-Wen Lin is currently a Professor with the Department of Electrical Engineering, National Tsing Hua University (NTHU), Hsinchu, Taiwan. He is also Deputy Director of NTHU AI Research Center. His research interests include computer vision, image and video processing, and machine learning. He has served as an Associate Editor of IEEE Transactions on Image Processing, IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Multimedia, IEEE Multimedia Magazine. He is a Fellow of the IEEE and a Distinguished Lecturer of IEEE CASS.

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Towards Global Rate Distortion Optimization in Video Coding: Recent Developments

Prof. Ce Zhu, University of Electronic Science and Technology of China, Chengdu, China

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

“Sponsored by the IEEE Circuits and Systems Society under its Distinguished Lecturer Program”

Date : 07 August 2019 (Wednesday)
Time : 10.30 AM - 11.30 AM
Venue : Meeting Room C (S1-B1C-111), NTU

Abstract

The past decades have witnessed great advancement of video coding techniques and their wide applications in video storage and communications, where rate-distortion optimization (RDO) plays a crucial role to maximize coding efficiency in video coding. In the current block-based hybrid video coding framework, the RDO is typically performed on the block level individually and independently, which is far from being optimal as it ignores the strong spatial-temporal dependency. However, a global RDO problem becomes so complex that the processing of each coding unit is dependent and entangled with each other due to the extensive use of spatial-temporal predictions in video coding. In the talk, I will discuss the challenges of achieving global RDO in one-pass video coding and present our recent work considering the temporal dependency on top of the video coding standards H.264/AVC and HEVC, respectively.

Speaker Biography

Ce Zhu is currently a Professor with the School of Information and Communication Engineering, University of Electronic Science and Technology of China, Chengdu, China. His research interests include image/video coding and communications, 3D video, visual analysis and understanding, visual perception and applications. He has served on the editorial boards of a few journals, including as an Associate Editor of IEEE Transactions on Image Processing, IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Broadcasting, IEEE Signal Processing Letters, and IEEE Communications Surveys and Tutorials. He is a Fellow of the IEEE and a Fellow of the IET.

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Energy Efficient Embedded AI for Artificial Intelligence-of-Things

Prof. Yong LIAN, York Uinversity, Canada

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 03 September 2019 (Tuesday)
Time : 03.00 PM - 04.00 PM
Venue : EEE Executive Seminar Room (S2.2-B2b-53), NTU

Abstract

Internet-of-Things (IoT) is the inter-networking of physical devices, vehicles, buildings, and objects with embedded sensors. It is estimated that by 2020 there will be more than 34 billion IoT devices connected to the Internet. Nearly $6 trillion will be spent on IoT solutions over the next five years. Artificial Intelligence (AI), on the other hand, is intelligence demonstrated by machines that work and react like humans. The combination of AI and IoT gives birth of Artificial Intelligence-of-Things (AIoT). AIoT devices differ from IoT devices that not only they sense, store, transmit data but also analyze and act on data, i.e. the AIoT device makes a decision or perform a task similar to what a person could do. The enabling technology for the AIoT device is embedded AI. This talk will cover the energy efficient machine learning algorithm that utilizes the continuous-in-time and discrete-in-amplitude (CTDA) signal flow. The CTDA signal flow enables data compression at the input source, which greatly reduces the arithmetic operations in neural network. We will show by examples that the CTDA scheme significantly improves energy efficiency and is well suited for AIoT applications.

Speaker Biography

Dr. Yong LIAN received the B.Sc degree from the College of Economics & Management of Shanghai Jiao Tong University in 1984 and the Ph.D degree from the Department of Electrical Engineering of National University of Singapore (NUS) in 1994. His research interests include low power techniques, continuous-time signal processing, biomedical circuits and systems, and computationally efficient signal processing algorithms. His research has been recognized with more than 20 awards including the 1996 IEEE Circuits and Systems Society's Guillemin-Cauer Award, the 2008 Multimedia Communications Best Paper Award from the IEEE Communications Society, 2011 IES Prestigious Engineering Achievement Award, 2013 Outstanding Contribution Award from Hua Yuan Association and Tan Kah Kee International Society, and the 2015 Design Contest Award in 20th International Symposium on Low Power Electronics and Design. He is also the recipient of the National University of Singapore Annual Teaching Excellence Awards in 2009 and 2010, respectively.

Dr. Lian is the President of the IEEE Circuits and Systems (CAS) Society, a member of IEEE Technical Activities Board, Chair of IEEE Periodicals Partnership Opportunities Committee, a member of IEEE Periodicals Committee, a member of IEEE Periodicals Review and Advisory Committee, a member of IEEE Biomedical Engineering Award Committee, and a member of Steering Committee of the IEEE TBioCAS. He was the Editor-in-Chief of the IEEE TCAS-II for two terms, a member of IEEE Fellow Committee for 3 terms, and many leadership positions with IEEE Circuits and Systems Society. He is the founder of BioCAS, ICGCS, and PrimeAsia.

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Efficient FastICA Algorithms and Architectures for EEG Signal Separation

Prof. Lan-Da Van, National Chiao Tung University, Taiwan

Organized by IEEE Circuits and Systems Singapore Chapter & IEEE Signal Processing Singapore Chapter & Centre for Infocomm Technology (INFINITUS), School of EEE, NTU

Date : 03 September 2019 (Tuesday)
Time : 04.00 PM - 05.00 PM
Venue : EEE Executive Seminar Room (S2.2-B2b-53), NTU

Abstract

In this talk, three efficient fast independent component analysis (FastICA) hardware designs with the modified algorithms for electroencephalogram (EEG) signal separation will be addressed. The features are summarized as follows: 1) energy-efficient FastICA using the proposed early determination scheme; 2) cost-effective FastICA using the Gram-Schmidt based whitening algorithm, and 3) online FastICA algorithm and architecture with the limited memory. The post-layout simulation results can valid the design concepts.

Speaker Biography

Lan-Da Van (S'98-M'02-SM16) received the B.S. (Honors) and the M.S. degree from Tatung Institute of Technology, Taipei, Taiwan, in 1995 and 1997, respectively, and the Ph. D. degree from National Taiwan University (NTU), Taipei, Taiwan, in 2001, all in electrical engineering. From 2001 to 2006, he was an Associate Researcher at National Chip Implementation Center (CIC), Hsinchu, Taiwan. Since Feb. 2006, he joined the faculty of the Department of Computer Science, National Chiao Tung University (NCTU), Hsinchu, Taiwan, where he is currently an Associate Professor. From 2015, he servers the Deputy Director of NCTU M2M/IoT R&D Center. His research interests are in digital signal processing and learning computation algorithms, architectures, chips, systems and applications, where this includes the design of low-power/ high-performance/ cost-effective 3-D graphics processing system, adaptive/learning systems, computer arithmetic, filters, transforms, and AI IoT/M2M applications.

Dr. Van was a recipient of the Chunghwa Picture Tube (CPT) and Motorola scholarships in 1995 and 1997, respectively. In 2005, he received the Best Poster Award in the iNEER Conference for Engineering Education and Research (iCEER). In 2014, he received the Best Paper Award in the IEEE International Conference on Internet of Things (iThings2014). He was a recipient of the Teaching Award of the Computer Science College, National Chiao Tung University in 2014. Dr. Van served as Chairman of the IEEE NTU Student Branch in 2000. In 2001, he has received the IEEE Award for outstanding leadership and service to the IEEE NTU Student Branch. From 2009 to 2010, he served as an Officer of the IEEE Taipei Section. In 2014, he was a Track Co-Chair of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). In 2016, he was a Program Co-Chair of the NCTU Forum of Technology and Application of Internet of Things. He was a Track Co-Chair of the 2018 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), a Special Session Co-Chair of the 2018 IEEE International Conference on DSP, and an Area Chair of the IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2019). In 2019, he serves as a Publicity Chair of the 32nd IEEE International System-on-Chip Conference (SOCC 2019) and serves as a Best Paper Award Committee Member of the IEEE AICAS 2019. Dr. Van served as an Associate Editor for the IEEE Transactions on Computers (2014~2018), and an Associate Editor for the Journal of Medical Imaging and Health Informatics (2014~2017), and has been serving as an Associate Editor for the IEEE Access (2018~present), and a Board Members of the Journal of Medical Imaging and Health Informatics (2017~present). In 2019, Dr. Van is graded as Taiwan Firmware Academy Fellowship.

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Bridging ICT and Medical Technologies for Smart Disease Diagnosis

Professor Myung Hoon Sunwoo, Ajou University, Korea

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 04 September 2019 (Wednesday)
Time : 10.00 AM - 11.00 AM
Venue : EEE Executive Seminar Room (S2.2-B2b-53), NTU

Abstract

Using deep learning/artificial intelligence (DL/AI) and big data, interdisciplinary technologies of ICT and medical care are emerging and rapidly changing the paradigm of medical care and disease diagnosis and these trends are becoming more and more popular in medical care services. This talk introduces the Ultra-small-sized Diagnostic Smart Devices (uDSD) research center that consists of several universities, hospitals and companies. It investigates emerging interdisciplinary technical areas covering chip design, mobile platform-based intelligent diagnosis, deep learning/artificial intelligence (DL/AI), big data, medical imaging, etc. Currently, the center conducts joint research and development with hospitals and companies to diagnose jaundice test using smart phones, smart capsule endoscope, DL-based mammography, etc. In addition, the uDSD center can promote and contribute mobile platform-based telemedicine that will become widespread in the near future.

Speaker Biography

Myung Hoon Sunwoo received the M.S. degree in Electrical and Electronics Engineering from Korea Advanced Institute of Science and Technology (KAIST), and the Ph.D. degree from the University of Texas at Austin in Electrical and Computer Engineering. He worked for the Electronics and Telecommunications Research Institute (ETRI) in Korea and for the Digital Signal Processor Operations, Motorola, in Austin, Texas, U.S.A. Since 1992, he has been with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea, where he is currently a full Professor.

He served on the General Chair of International Symposium on Circuits and Systems (ISCAS) 2012, Seoul, the successful event held in Korea and will serve again on the General Chair of ISCAS 2021, Daegu Korea. He initiated a new IEEE Circuits and Systems Society (CASS) chapter in Daegu, Korea, which succeeded in ISCAS 2021 bidding. He has been involved in various technical activities over three decades including a member of IEEE CASS BoG (Board of Governors) (2011 - 2016), a CASS Distinguished Lecturer (2009 - 2010) and a Technical Committee member for numerous conferences. As an IEEE CASS VP-conferences, he initiated the first International Conference on Artificial Intelligence Circuits and Systems (AICAS), successfully held in Hsinchu, March 2019.

He has authored over 430 papers and also holds 90 patents and has received 45 awards. Currently, he is the Director of the micro Diagnostic Smart Devices (uDSD) Information and Telecommunication Research Center (ITRC) sponsored by Korean Government. The uDSD center consists of several universities, hospitals and companies to cover emerging interdisciplinary technical areas, such as chip design, deep learning (DL), AI, big data, medical imaging, etc. His research interests cover low power algorithms and architectures, medical devices, DL/AI, and application-specific SoC design.

He was a President of the IEIE (Institute of Electronics and Information Engineers) Semiconductor Society in Korea (2012 - 2013). He was an honorary ambassador of Korean Tourism Organization. He was a chair of IEEE CASS, Seoul Chapter (2004 - 2018). He is currently an IEEE CASS VP-Conferences and an IEEE Fellow.

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Energy-Efficient Sensor Node Processor Design for Intelligent Sensing Applications

Professor Jun Zhou, University of Electronic Science and Technology of China

Organized by IEEE Circuits and Systems Singapore Chapter & Centre for Bio Devices and Signal Analysis (VALENS), School of EEE, NTU

Date : 04 September 2019 (Wednesday)
Time : 11.00 AM - 12.00 PM
Venue : EEE Executive Seminar Room (S2.2-B2b-53), NTU

Abstract

Intelligent sensing has been widely adopted in applications including health monitoring, intelligent surveillance and smart robots. There are several common requirements for the smart sensing applications, including intelligence, real-time processing, low power consumption and miniaturization. Among them, the requirements for intelligence, real-time processing and miniaturization pose big challenge on the requirement of low power consumption. This tutorial talks about how to address the abovementioned challenge by combining innovation and optimization through the design hierarchy on algorithm, architecture and circuit levels in the design of sensor node processor for intelligent sensing applications.

Speaker Biography

Jun ZHOU, Professor of National Distinguished Youth Experts Scheme, Head of IoT Smart ICs & Systems Group, University of Electronic Science and Technology of China. His major research interests include energy-efficient algorithm & IC co-design for intelligent sensing applications. He has published more than 60 papers in prestigious conferences and journals including ISSCC, JSSC, DAC, TCAS-I, TBioCAS, and TVLSI. His work has received the IEEE Circuits & Systems Society Seoul Chapter Award and has been reported by EE Times. He is currently a senior member of IEEE, the Associate Editor of IEEE Transactions on Very Large Scale Integration System (TVLSI), the Chair of A-SSCC Digital Circuits & Systems Sub-Committee and the Chair of Embedded AI Committee of Sichuan Institute of Electronics. He has also served as OC/TPC member for a number of prestigious IEEE conferences including ICCD, ISCAS, SOCC and DSP.

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