IEEE ED/CAS/SSC Chicago Chapter

System-on-a-chip efforts are underway worldwide. With the continued scaling of CMOS technology, future integrated systems will comprise giga-gate communications processors and microprocessors in addition to mixed-signal interfaces to sensors/actuators and mixed-signal/RF interfaces to wireless networks. While prospects are limitless, future challenges are also daunting. Many key questions need to be addressed:

How to design high-performance analog interfaces in ultra low-voltage scaled CMOS technologies?

How to design low-voltage mixed-signal RF interfaces with very high manufacturing yields?

How to design mixed-signal/RF subsystems that are immune to massive amounts of on-chip digital switching noise?

How to efficiently test and debug extremely complex integrated systems?

Assuming that Moore's Law remains valid over the next two decades, this talk provides an overview of the system-on-a-chip CMOS integration challenges and outlines state-of-the-art solutions that hold promise for future implementations.

David J. Allstot received the B.S.E.S. degree from the University of Portland in 1969, the M.S.E.E. degree from Oregon State University in 1974, and the Ph.D. degree from the University of California at Berkeley in 1979. He has held industrial positions with Tektronix, MOSTEK, and Texas Instruments, and academic positions with Oregon State University, Carnegie Mellon University, and Arizona State University. He became a Professor of Electrical Engineering at the University of Washington in 1999.

Place:
Motorola
1301 Algonquin Road
Schaumburg, Illinois

Attendance: 91