Description

With the test technology facing its grand challenges to ensure the quality of ICs and electronic systems incorporating more and more sophisticated manufacturing processes and system integration technologies in various emerging applications such as Internet of Things, cloud computing, automotive electronics, etc., global proliferation and cooperation is increasingly more important. International Test Conference has been a flagship conference in test technology since 1970. With an attempt to stimulate more discussion and interaction between the academia and the industry around the globe, the 1st ITC-Asia was initiated in Taipei in 2017, and the 2nd ITC-Asia was held with great success in Harbin China in 2018. The 3rd ITC-Asia will be held in Tokyo Japan in 2019. Attendee can involve themselves in attractive sessions on the state-of-the-art test technology trend and several industry topics. We kindly invite you to submit your work to ITC-Asia 2019. The outstanding papers with extension will be invited to ITC-2019.

Website: https://www.itc-asia.info.hiroshima-cu.ac.jp/2019/

Call for paper

Important Dates

Draft paper submission deadline:2019-01-25

Call for paper description

Regular paper submissions should be made electronically by PDF manuscripts only, not exceeding 6 pages in IEEE 2-column format (including abstract, figures, tables, and bibliography). A submission will be considered evidence that upon acceptance at least one author will attend the conference to make the presentation. Authors of accepted papers are also responsible for preparing the final manuscripts in time to be included in the electronic proceeding. Conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases. At least one full registration to the conference is required for each accepted paper.

Topics of submission

Topics of Interests include (but are not limited to) the following topics:

  • Autonomous Testing

  • Heterogeneous Testing

  • Reliability and Testing for Approximate/Quantum Computing

  • Hardware Oriented Security and Trust

  • Design Validation and Debug

  • ATE Design

  • Analog and Mixed-Signal Test

  • RF Test

  • High-Speed I/O Test

  • Fault Modeling and Simulation

  • ATPG (Automatic Test Pattern Generation)

  • Design for Testability

  • Built-In Self-Test

  • Delay Test

  • System-on-Chip Test

  • Test Compression

  • Power-Aware and/or Thermal-Aware Test

  • Memory Test, Diagnosis, and Repair

  • Fault Diagnosis and Failure Analysis

  • Yield Analysis and Learning

  • Safety and Test for Automotive ICs

  • Test for Internet of Things

  • Test for Emerging Devices

  • CPU/GPU Test

  • MEMS/Sensor Test

  • Online Test

  • On-Chip Measurement

  • SiP, 2.5D, and 3D IC Test

  • Interconnect Test

  • Board-Level Testing and Diagnosis

  • Test Standards

  • Test Economics

  • Reliability Issues

  • Fault Tolerance

  • Test for Reconfigurable Systems

  • Software Test and Reliability

  • Dependable Systems and Networks

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Important dates

  • Conference Dates

    03 Sep.

    2019

    TO

    05 Sep.

    2019

  • 25 Jan.

    2019

    Draft paper submission deadline

Contact information

  • k_miyase@cse.kyutech.ac.jp

Sponsored By

  • College of Industrial Technology
    Nihon University
    Hiroshima City University
    IEEE Computer Society
    IEEE Council on Electronic Design Automation
    Kyushu Institute of Technology - KIT
    Tokyo Denki University

Conference Series