Date: Tuesday, April 20th, 1999.
Dallas Texins Association at Texas Instruments 13900 N Central Expwy.
7.00 refreshments, 7.30 Program
The World's First Single-Chip Television Tuner
Speaker: Ken Clayton, Staff IC Designer,
Microtune, Inc.
Summary: A single chip television tuner for cable and off-air applications
will be described. The chip is suitable for NTSC analog signals as well as
QAM-64, QASM-256 and VSB-8 digital modulations. This flexibility allows the
device to be used in conventional analog televisions and VCRs as well as in
emerging digital video applications such as DTVs, cable modems, digital cable
set-top boxes and PCs. The device is manufactured in a standard 0.8u BiCMOS
process and assembled into a low cost plastic quad flat pack package.
About the speaker:
Ken Clayton is a Staff IC Designer at Microtune, Inc. He obtained his
BSEE degree from Brigham Young University in 1986. While working for the
Center for Integrated Sensors at the University of Michigan he received
his MSEE in 1988. After graduate school he worked seven years at
Motorola for the Consumer Electronics Group doing IC design ranging from
television baseband processing to IF and RF design. In 1995 joined
Cirrus Logic in Plano, Texas as part of the aggressive, cutting edge
project which led to the formation of Microtune in 1996. Ken has
co-authored four articles, three of which appear in the IEEE
Transactions on Consumer Electronics and he holds one
patent.
For any further information please contact:
Ken Clayton
Microtune, Inc.
2540 East Plano Parkway
Suite 188
Plano, TX 75074
tel 972.673.1711
fax 972.673.1602
email:ken_clayton@microtune.com
Date: Tuesday, June 15, 1999
Dallas Semiconductor Corporation
4401 S. Beltwood Pkwy, Bldg. F
Dallas, Texas 75244 (972) 371-4000
Complimentary Dinner- 6:30PM; Presentation - 7:00PM-8:00PM
Design considerations for CMOS and BiCMOS VCOs for RF
Applications
Program Summary: In wireless communication systems design, the
trend toward low cost and large-scale integration requires fully
integrated RF frequency synthesizers, preferably in CMOS. The most
challenging building block of RF frequency synthesizers in terms
of integration is the VCO, due to its very stringent phase noise
specifications.
After a brief introduction to the generic structures of ring and
negative-conductance LC oscillators, the trade-offs involved in
the design of these circuits will be addressed. A fully differential
four-stage ring oscillator design at 350MHz will be presented
together with its measurement results. The circuit was designed
with HP 0.5um digital CMOS technology through MOSIS. Examples of
GHz range CMOS negative-conductance LC oscillators using state-of-
the-art topologies will also be presented with their preliminary
simulation results.
Fikret Dulger received the B.S. and M.S. degrees in electronics
from Istanbul Technical University, Istanbul, Turkey, in 1993 and
1996, respectively. He worked as a research assistant at the
Electronics and Communication Engineering Department of Istanbul
Technical University from 1993 to 1996. In 1994 he worked for ETA
ASIC Design Center, Istanbul, as a design engineer developing
full-custom mixed-mode industrial ASIC's. He is currently pursuing
the Ph.D. degree in electrical engineering as a Graduate Assistant
in Electrical Engineering Department of Texas A&M University,
College Station, TX. He was with Texas Instruments, Dallas, TX,
from May 1998 to December 1998 as a Design Engineer characterizing
and designing GHz range BiCMOS dual-modulus prescalers and
voltage-controlled Oscillators. His research interests include
the design of building blocks of PLL frequency synthesizers for
wireless communication systems with an emphasis on voltage-controlled
oscillators.
For a copy of the trasparencies click here (almost 3MB).
For any further information please contact:
Fikret Dulger
Analog and Mixed-Signal Center
Department of Electrical Engineering
Texas A&M University
College Station, TX 77843
tel 409.845.9583
fax 409.845.7161
email:fikret@ee.tamu.edu
URL:
https://amesp02.tamu.edu/~fikret
Date: Monday, September 20, 1999
Dallas Texins Association at Texas Instruments 13900 N Central Expwy.
Conference Rooms 1 and 2.
Complimentary Dinner 6:30PM, 7:00PM Program.
High Speed and Resolution Digital/Analog Converter Integrated Circuits
Program Summary: Broadband communications and high bandwidth systems involving the
transmission of analog data are imposing increasingly demanding requirements
on the spectral purity of the analog signals synthesized for such
transmission at
the transmitting end and the linearity of the receiving module at the
receiver end. These requirements translate to the need for high speed and
resolution digital/analog converters (DACs) at the transmitter and
analog/digital converters (ADCs) at the receiver.
In this talk we focus on the digital/analog conversion problem. A brief
introduction to digital/analog conversion principles and background will
first be given, followed by a brief review of current state-of-the-art
digital/analog conversion circuits and shortcomings. DACs currently
available address the
issue of static linearity in considerable detail but exhibit pronounced
degradation of their output signal spectral purity (as measured for example
by the spurious free dynamic range, or SFDR) for increasing signal
frequencies.
This renders them unsuitable for the most demanding communications
applications, where harmonics from one channel, created due to the DAC's
nonlinear characteristics, spill over into adjacent channels and cause
information corruption.
We then review in some detail one chip which has been the result of our
research into designing DAC ICs for high dynamic linearity and maximum SFDR
performance. The chip, implemented in a 0.8um CMOS process, utilizes a novel
track/reset output circuit at the output of a current-mode high speed DAC.
The output circuit creates a return-to-zero output waveform from the DAC
output, and is designed to minimize the amount of dynamic nonlinearities
present in this waveform. Testing of the chip has shown it to exhibit
significant improvements in dynamic linearity over the current state-of-the
art. For a 60MS/s update rate, the measured SFDR performance is 80dB for
5MHz input signals and is down only to 75dB for 25MHz signals, which are
close to the 30MHz Nyquist bandwidth.
Alex R. Bugeja received the B.Eng.(Hons) degree from the University of Malta
in 1994, and the S.M. degree in Engineering Sciences from Harvard University
in 1996. Currently he is completing his PhD degree in Electrical Engineering
at the University of Illinois at Urbana-Champaign. From 1995 to 1996 he was
a research assistant in the Division of Engineering and Applied Sciences at
Harvard University, working on high speed image and computer vision
coprocessing integrated circuits. From 1996 to 1999 he was a research
assistant with the Department of Electrical and Computer Engineering and the
Coordinated Science Laboratory at the University of Illinois at Urbana
Champaign, working on high speed and high resolution digital-to-analog
converters. Since 1998 he has also been with Texas Instruments in Dallas,
Texas as a design engineer in the Data Converter Design Group. His current
interests include high speed and resolution data converters and mixed-signal
integrated circuit design.
A copy of the transparencies can be downloaded:
Part I (Introduction and
background)
Part II (Research Excerpt)
Note: these two files are compressed postscript files. In order to
un-compress them you need gunzip (available for instance on
WinZip for
Windows; typically available in all the UNIX systems). On Unix use:
gunzip part1.ps.gz
gunzip part2.ps.gz
For any further information please contact:
Alex Bugeja
Data Converter Design Group
Texas Instruments Inc.
P.O.Box 660199, MS 8799
Dallas, TX75266
tel 972.480.2658
fax 972.480.2920
email:a-bugeja1@ti.com
URL:
https://www.ti.com
Date: Tuesday, November 9, 1999
Dallas Texins Association at Texas Instruments 13900 N Central Expwy.
(north-bound access road between Midpark Rd. & Spring Valley Rd.)
Conference Room 4
Complimentary Dinner 6:30PM, 7:00PM Program.
Advanced Electronic Features for Hearing Aids and Other Portable
Devices
Program Summary: Hearing aids have been greatly improved over the years
because of better
technology and more innovative ideas. An interdisciplinary design approach
has been used to transform marketing and customer needs into obtainable
research goals. This presentation introduces three novel features, which
can
be conveniently implemented in an existing or future hearing aid device.
First, a Volume Control Receiver that detects incoming wireless commands
and
controls the output level of the hearing aid. Then, a Programmable
Interface
Receiver that also processes encoded signals, and stores a pre-programmed
setting that fits the user's pattern of hearing loss. Finally, a Noise
Reduction System that improves hearing capabilities and speech
intelligibility for hearing aid users exposed to noisy environments. The
features mentioned before have an immediate application in today's market
and
their demand will only increase in the near future. More important, their
applications are not only limited to hearing aid devices, but to any design
that requires a wireless interface or other state-of-the-art portable
devices. Each feature has not been only proven successful conceptually, but
also experimentally with the implementation of physical prototypes on
single
integrated circuit (IC) microchips.
Alexander H. Reyes received the M.S. and Ph.D. degrees in Electrical
Engineering from Texas A&M University in 1993 and 1999, respectively. From
1990 to 1998, he developed several prototypes for hearing aids. These
projects were funded by Texas A&M University, Baylor College of Medicine,
Houston Medical Center, University of Extremadura and Iberdrola S.A. He is
the recipient of the IEEE Circuits & Systems Society Outstanding Young
Author
Award, 1996; and the Outstanding Young Persons Award, for the Advancement
of
Science and Technology, Bolivia, 1996. Since 1998, he has been working as
an
IC Design Engineer for the Semiconductor Group at Texas Instruments. His
current interests include IC mixed-signal design for consumer applications.
For a copy of the trasparencies click here (almost 2.5MB).
For any further information please contact:
Dr.Alexander Reyes
Texas Instruments Inc.
P.O.Box 660199, MS 8729
Dallas, TX 75243
email:areyes@ti.com
