CPMT Technical Committee on EDMS (formerly TC-12)

FDIP Workshop

Future Directions in IC and Package Design Workshop

• Presentations from FDIP '10 workshop
1. Thinking in 3D, Improving perfornamce and modularity
2. A Novel Embedded Common-mode Filter for above GHz differential signals based on Metamaterial concept
3. 3D Heterogeneous Technologies for Memory-Processor & CMOS-Sensor Stacking
4. Signal Integrity Design of TSV-Based 3D IC
5. High-Bandwidth Integrated Optics for Server Applications
• Presentations from FDIP '09 workshop
1. System Electromagnetic Extraction and Modeling in a Collaborative World
2. Future EM Tool Requirements for Industry-Based Hardware Designs
3. Preparing for Future System Design Challenges: Advanced Technologies and Integration
4. Fast 3D EM Simulation for Digital System Design
5. Trends and Requirements for System-Level Design of Signal and Power Delivery
6. An Industry-Academic Collaborative Model for EM CAD Research and Development in Packaging
7. Accounting for Variability and Uncertainty in Signal and Power Integrity Modeling
• Presentations from FDIP '08 workshop
1. Design and Modeling of Through-Silicon Vias for 3D Integration
2. Design Considerations for Highly Integrated 3D SiP for Mobile Applications
3. Advanced Surface Based MoM Techniques for Packaging and Interconnect Analysis
4. Electromagnetic Solvers for Interconnect and Package Modeling - New Developments
5. Accelerated, Parallelized Integral Equation Techniques for Packaged Microelectronics
• Presentations from FDIP '07 workshop
1. Signal Bandwidth for High-Performance Computing
2. Power Delivery System Design Challenges
3. Wireless Proximity Communications for 3D System Integration
4. Modeling Challenges for Power Distribution Analysis
5. A Critical Assessment of the State of the Art in Multiscale Multiphysics Modeling of Microelectronics
6. Power Delivery Challenges for the Mobile Platforms
• Presentations from FDIP '06 workshop
1. Chip-Multithreading Keeps the Data Center Cool
2. Electromagnetic and Circuit Co-Simulation and the Future of IC and Package Design
3. Solving the Challenges Posed by Chip/Package/Board Co-Design
4. Package Net Group Creation
5. Characterizing and Managing Variability in Microprocessor Chips
6. Future Directions in Computational Electromagnetics for Digital Applications
7. Modeling and Analysis Challenges for Complex Digital Systems-in-Package Designs
• Presentations from FDIP '05 workshop
1. Computational Electromagnetics for Circuits Simulations--the Challenges (current_w_gap.mpg)
2. Signal Interconnect Trends and Challenges Inside the CEC
3. Server Design in a Commodity World
4. Electromagnetic Field Visualization System for IC/Package Design Based on Optical Techniques
5. Harnessing the Power of Parallel Computation on the IBM BlueGene/L to Analyze Complex Digital and RF Systems
6. High Volume Signal and Power Integrity Design for ASICs
• Presentations from FDIP '04 workshop
1. Gigascale Integration - Design Challenges and Opportunities
2. Emerging Trends in High-Speed Interconnects and Packaging Engineering
3. Analog RF CMOS and Optical Design Techniques for 10+ Gbps Datacom
4. Power Distribution - Status and Challenges
5. Signal Integrity Modeling and Simulation for IC/Package Co-Design
6. Current and Future Directions in Simulator Development
• Presentations from FDIP '03 workshop
1. BlueGene/L Supercomputer
2. Mixed-Signal Measurement Circuits For Embedded Test Access
3. CAD Tool Requirements for Next Generation On-Chip Signal Integrity
4. Toward Full-Chip Analysis with EM Accuracy
5. Clock Distribution for Multi-GHz Microprocessors
6. Package Level EMI Study
7. The Challenge of Correct Modelling and Testing of Advanced High-Speed Multi-Pin Connectors
• Presentations from FDIP '02 workshop
1. Full Chip Analysis
2. The Impact of Chip and Package Design on Radiated EMI
3. Network Processors
4. Optimization of Electrical Package Design and PCB Design for CSP Age
• Presentations from FDIP '01 workshop
1. Coupled Interference in Mixed Signal Wireless ICs and Implications for Package Design
2. Integration of RF passive elements in telecommunication
3. Next-Generation System Design Challenges and Opportunities
4. Wafer level Stacking